On-chip Negative Bias Temperature Instability Sensor using Slew Rate Monitoring Circuitry

Negative Bias temperature Instability (NBTI) has become one of the major sources of degradation in scaled PMOS devices, affecting the yield and reliability of circuits as well as the power and performance. As the oxide thickness decreases with each technology generation, increased oxide electric field and higher current densities degrade the performance and lifetimes of devices (especially PMOS) due to stress. Hence, it has become necessary to understand and accurately measure the effect of NBTI in PMOS devices. This paper proposes detection of PMOS threshold voltage degradation using on-chip slew-rate monitor circuitry. The increase in the PMOS threshold voltage is sensed with high resolution using the change of rise time in a stressed ring oscillator. Simulation results are shown for the detection circuitry in a 65nm IBM CMOS process.